Driving conventional power MOSFETs from active control circuitry requires a separate pin or input terminal, in addition to the source, drain and gate terminals, for connection to a power supply. For example, MOSFET M1 shown in FIG. 1 contains an input A through which a supply voltage V.sub.CC is provided to a control circuit C1, which in turn supplies a gate drive signal V.sub.GS to the gate of MOSFET M1.
In FIG. 2, control circuit C1 is shown as including CMOS buffers A1, A2 and A3, which increase the current supplied to the gate of MOSFET M1. Buffer A1 provides a low input capacitance but little current gain. Buffer A2 doubles the current from the first stage, and buffer A3 doubles the current again. As is well known, the width-to-length ratio W/L of the channel of the NMOSFET in buffer A1 sets its current sinking and sourcing ability. A minimum size gate in a 2 .mu.m technology may be a W/L=20 .mu.m/2 .mu.m for the NMOSFET, and the W/L for the PMOSFET in buffer A1 would be 40 .mu.m/2 .mu.m; in buffer A2, W/L for the NMOSFET would be 40 .mu.m/2 .mu.m and W/L for the PMOSFET would be 80 .mu.m/2 .mu.m; in buffer A3, W/L for the NMOSFET would be 80 .mu.m/2 .mu.m and W/L for the PMOSFET would be 160 .mu.m/2 .mu.m. Each of buffers A1, A2 and A3 is supplied by a voltage equal to the difference between V.sub.CC and V.sub.S (which in this case is ground). The current needed to drive each stage is derived from power drawn from the V.sub.CC pin. The output of digital logic or a microprocessor may be incapable of driving the input capacitance of the power MOSFET directly. The result would be a slow switching speed and possible overheating of the power MOSFET. The buffers solve this problem by drawing power from V.sub.CC stage-by-stage to speed up the switching of the MOSFET.
Thus, in the circuit of FIG. 2 it is still necessary to provide control circuit C1 with a separate input V.sub.CC. In many situations, it is difficult or at least inconvenient to provide a separate power input. One possible reason is that the buffers may operate on a different supply voltage. A separate supply line may not be available on the printed circuit board (PCB) in the vicinity of the power device. Most importantly, a separate V.sub.CC pin precludes integration of the buffer into the same silicon or same package as the power MOSFET, since the least costly high power packages such as the TO-220 or D.sup.2 PAK (a mechanical drawing registered with JEDEC) have only three terminals. Therefore, the power for the buffer must be derived from at least one pair of the pins.